In many electronic applications, it is often desirable or even required to protect electronic circuitry, such as on a printed circuit board (PCB) or a portion thereof, from unlawful or unauthorized access. This is especially true for electronic circuitry that includes cryptographic modules or functionality. For example, postage security devices (PSDs) are required by the United States Postal Service to comply with FIPS 140-2 level 3 issued by the National Institute of Standards and Technology (NIST). FIPS 140-2 level 3 requires that PSDs have a full envelope of physical tamper protection and detection which encloses all electrical nodes.
It is known in the prior art to protect PCBs from tampering by enclosing the PCB in an enclosure, such as a metal case. Such an enclosure provides a physical barrier against tamper attempts. Such enclosures alone, however, are vulnerable to physical attacks such as drilling through the enclosure to gain access to the electronic circuitry. Other prior art methods of tamper protection involve wrapping the entire electronic circuitry, such as a PCB, in a tamper barrier wrap. Such wraps include a flexible film made of, for example, poly vinylidene fluoride (PVDF) and typically further include circuit elements used in detecting tamper attempts. The wrap in such methods is then typically hand soldered to the electronic circuitry to complete the detection circuits and potted using an encapsulating epoxy or the like. Due to the required manual soldering and potting, these methods are typically time consuming and not well suited to automated/mass production. In addition, commercially available tamper barrier wraps are relatively expensive, thereby adding significantly to the overall cost of making tamper protected circuitry.